Tag: side channel

Nov 10

Workshop on Cryptographic Hardware and Embedded Systems CFP

 

+————————————————————————-

!                                                                        

!                                    CHES 2012 

!                             

!                       Workshop on Cryptographic Hardware

!                               and Embedded Systems   

!                    

!                                 Leuven, Belgium                           

!                               9-12 September 2011          

!                                                                        

+————————————————————————-+

 

Important Dates

===============

 

  Submission deadline:      March 5, 2012, 23:59 PST

  Acceptance notification:  May 14, 2012

  Final version due:        June 18, 2012

  Workshop presentations:   September 9-12, 2012

 

 

Background, aim and scope

=========================

 

     CHES covers new results on all aspects of the design and analysis of cryptographic hardware and software implementations. The workshop builds a bridge between the cryptographic research community and the cryptographic engineering community. With participants from industry, academia, and government organizations, the number of participants has grown to over 300 in recent years.

 

     In addition to a track of high-quality presentations, CHES 2012 will offer invited talks, tutorials, a poster session, and a rump session. CHES 2012 especially encourages submissions on the following two subjects: DESIGN METHODS TO BUILD SECURE AND EFFICIENT HARDWARE OR SOFTWARE and LEAKAGE RESILIENT CRYPTOGRAPHY INCLUDING NEW MODEL DEFINITIONS AND ANALYSIS AND THE DESIGN OF NEW CRYPTOSYSTEMS. All submitted papers will be reviewed by at least four Program Committee members.

    

     This year, authors will be invited to submit brief rebuttals of the reviews before the final acceptances are made.

 

 

TOPICS

======

 

The topics of CHES 2012 include but are not limited to:

 

 

Cryptographic implementations

 

– Hardware architectures for public-key, secret-key and hash algorithms

– Cryptographic processors and co-processors

– Hardware accelerators for security protocols (security processors, network processors, etc.)

– True and pseudorandom number generators

– Physical unclonable functions (PUFs)

– Efficient software implementations of cryptography

 

 

Attacks against implementations and countermeasures against these attacks

 

– Side channel attacks and countermeasures

– Fault attacks and countermeasures

– Hardware tampering and tamper-resistance

 

 

Tools and methodologies

 

– Computer aided cryptographic engineering

– Verification methods and tools for secure design

– Metrics for the security of embedded systems

– Secure programming techniques

– FPGA design security

– Formal methods for secure hardware

 

 

Interactions between cryptographic theory and implementation issues

 

– New and emerging cryptographic algorithms and protocols targeting embedded devices

– Special-purpose hardware for cryptanalysis   

– Leakage resilient cryptography

 

 

Applications

 

– Cryptography in wireless applications (mobile phone, WLANs, etc.)

– Cryptography for pervasive computing (RFID, sensor networks, smart devices, etc.)

– Hardware IP protection and anti-counterfeiting

– Reconfigurable hardware for cryptography

– Smart card processors, systems and applications

– Security in commercial consumer applications (pay-TV, automotive, domotics, etc.)

– Secure storage devices (memories, disks, etc.)

– Technologies and hardware for content protection

– Trusted computing platforms

 

 

Instructions for CHES Authors

=============================

 

Authors are invited to submit original papers via electronic submission. Details of the electronic submission procedure will be posted on the CHES webpage when the system is activated. The submission must be anonymous, with no author names, affiliations, acknowledgements, or obvious references. It should begin with a title, a short abstract, and a list of keywords. The paper should be at most 12 pages (excluding the bibliography and clearly marked appendices), and at most 18 pages in total, using at least 11-point font and reasonable margins. Submissions not meeting these guidelines risk rejection without consideration of their merits. All submissions will be blind-refereed. Only original research contributions will be considered. Submissions which substantially duplicate work that any of the authors have published elsewhere, or have submitted in parallel to any other conferences or workshops that have proceedings will be instantly rejected. The IACR Policy on Irregular Submissions (http://www.iacr.org/irregular.html) will be strictly enforced.

 

 

Poster Session

==============

 

The CHES technical sessions will include a slot for a poster session, open to any submitter.

 

Arrangements for submitting posters will be announced later.

 

Tutorial Sessions

=================

 

The program chairs welcome suggestions for half-day tutorials at ches2012programchairs@iacr.org

 

 

Program Committee

=================

 

To be announced!

 

Organizational Committee

========================

 

All correspondence and/or questions should be directed to either of the Organizational Committee members:

 

Program co-Chairs:

 

  Emmanuel Prouff

  Oberthur Technologies (France)

  Email: ches2012programchairs@iacr.org

 

and

 

  Patrick Schaumont

  Virginia Tech (USA)

  Email: ches2012programchairs@iacr.org

 

General co-Chairs:

 

  Lejla Batina

  Radboud University Nijmegen (Netherlands) and K.U. Leuven (Belgium)

  Email: lejla@cs.ru.nl

 

and

 

  Ingrid Verbauwhede

  K.U. Leuven (Belgium)

  Email: Ingrid.Verbauwhede@esat.kuleuven.be

 

Workshop Proceedings

====================

 

The proceedings will be published in the Springer Lecture Notes in Computer Science (LNCS) series in time for distribution at the workshop. Accepted papers should follow the LNCS default author instructions at URL http://www.springer.de/comp/lncs/authors.html (see file typeinst.pdf).  In order to be included in the proceedings, the authors of an accepted paper must guarantee to present their contribution at the workshop.

May 01

R package: side channel attack

Side channel attacks are probably among the most dangerous attacks in cryptanalysis. However, we observe that many scientific papers presenting new side channel attack do not give any implementation of their attacks neither any data would allowed to verify the claimed results. In other side, when a researcher need to realize an attack, he/she has to implement it. It is the reason why we developed a R package available on CRAN: Package sideChannelAttack. This package has many purposes: first, it gives to the community an R implementation of each known attack/countermeasure as well as data to test it, second it allows to implement a side channel attack quickly and easily.